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• Fellow

  Institute of Electrical and Electronics Engineers (IEEE) (2012.1.1)

  for contributions to testing of integrated circuits

  IEEE Fellow Class 2012

• Best Paper Award

  The 7th International Test Conference in Asia (2023.9.12)

  "A Low Overhead and Double-Node-Upset Self-Recoverable Latch"

  ......... ..........

• Best Paper Award

  2022 Asian Hardware Oriented Security and Trust Symposium (2022.12.20)

  "MRCO: A Multi-Ring Convergence Oscillator-Based High-Efficiency True Random Number Generator"

....... . .

• Best Paper Award

  30th IEEE Asian Test Symposium (2021.11.24)

  "GPU-Accelerated Timing Simulation of Systolic-Array-Based AI Accelerators"

....... . .

• Best Paper Award

  Institute of Electronics, Information and Communication Engineers (IEICE) /

  Information and Systems Society (2009.11.26)

  for papers on low-capture-power test generation for VLSIs

• Best Paper Award

  25th IEEE Asian Test Symposium (2016.11.22)

  "Logic/Clock-Path-Aware At-Speed Scan Test Generation for Avoiding False Capture Failures and Reducing Clock Stretch"

• Best Paper Award

  7th IEEE Workshop on RTL and High Level Testing (2007.10.12)

  "An Improved Method of Per-Test X-fault Diagnosis for Deep-Submicron LSI Cricuits"

• Research Recognition Award

  Information Processing Society of Japan / Northeastern Section (1994.5.11)