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Circuit Design
  1. C. Zhou, Y. Cao, Q. Shi, L. Wang, and X. Wen, "A Robust Newton Iteration Method for Mixed-Cell-Height Circuit Legalization under Technology and Region Contraints," IEEE Trans. on Design Automation of Electronic Systmes, Vol. 29, No. 6, Article 96, Sep. 2024.
  2. A. Yan, H. Bao, W. Jiang, J. Cui, Z. Huang, and X. Wen, "Efficient Design approaches to CMOS Full Adder Circuits," Microelectronics Journal, Vol. 149, 106235, Jul. 2024.
  3. K. Sasagawa, S. Wang, T. Nishikawa, H. Kai, Y. Higami, H. Takahashi, H. Yotsuyanagi, T. Ni, and X. Wen, "Deep-BMNN: Implementing Sparse Binary Neural Networks in Memory-Based Reconfigurable Processor (MRP)," Int`l Tech. Conf. on Circuits/Systems, Computers and Communications, pp. 1-6, Okinawa, Japan, Jul. 2024.
  4. W. Zhan, L. Zhang, X. Feng, P. Pan, and X. Wen, "An Equivalent Processing Method for Integrated Circuit Electrical Parameter Data Using BP Neural Networks," Microelectronics Journal, Vol. 139, 105912, Sep. 2023.
  5. H. Xu, P. Qi, F. Tang, R. Ma, H. Liang, Z. Huang, and X. Wen, "SwinT-ILT: Swin Transformer Embedding End-to-End Mask Optimization Model," Journal of Micro/Nanopatterning, Materials, and Metrology, Vol. 23, Iss. 1, 013201, Jan. 2024.
  6. W. Zhou, Y. Ouyang, D. Xu, H. Liang, and X. Wen, "Energy-Efficinet Multiple Network-On-Chip Architecture with Bandwidth Expansion," IEEE Trans. on Very Large Scale Integration Systems, Vol. 31, Iss. 4, pp. 442-455, Feb. 2023.
  7. Q. Xu, H. Geng, S. Chen, B. Yuan, C. Zhuo, Y. Kang, and X. Wen, "GoodFloorplan: Graph Convolutional Network and Reinforcement Learning Based Floorplanning," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, Vol. 41, No. 10, pp. 3492-3502, Oct. 2021.
  8. I. Syafalni, K. Wakasugi, T. Yang, T. Sasao, and X. Wen, "Design Automation for Legacy Circuits," Proc. of the 21st Workshop on Synthesis And System Integration of Mixed Information Technologies, pp. 174-179, Matsue, Japan, Mar. 2018.
  9. X. Wen and K. K. Saluja, "A New Method Towards Achieving Global Optimality in Technology Mapping," Proc. of IEEE/ACM Int’l Conf. on Computer Aided Design, pp. 9-12, San Jose, USA, Nov. 1996.